This Module is a prototype or in a concept phase.
Shift Register for Triggers and Gates
I'm developing a clocked binary shift register with 2 inputs and 9 outputs.
Built completely with CMOS parts (no cpu) and the size will be 4HP.
It is a very basic module (like a clock devider) but with some clever twists.
What you can do with it?
Just some thoughts and facts:
patchable LFSR
digital noise
pseudo random rhythms
1bit ad with nice aliasing and "binary beating"
runs audio rate! tested up to 100khz
algorithmic composition
rhythmic derivation using time relations
combine it with logic and or clock deviders
use rhythmic clocks
gate chopper
trigger connector
(up to) 8 step looper
level based (or rising edge) input (the key ingredient)
triggered or gated outputs with 10Vpp
expansion port (wink wink
... ... ...
https://www.muffwiggler.com/forum/viewtopic.php?t=199890&postdays=0&postorder=asc&start=0
