temps utile

6x clock generator

teensy3.x (cortex M4) based clock generator, w/ 128x64 OLED display.

i/o:
- 2 clock inputs
- 4 CV inputs (bipolar +/- 5V, assignable to any parameter)
- 6 clock outputs (5 digital: 10V, 1 DAC (12 bit; +/- 6V))

6 modes, selectable per channel:
- clock division/multiplication (pulse-width, multiplier): available across all modes.
- LFSR (length, tap1, tap2)
- random (N (threshold))
- euclidian (N (length), K (fill), offset)
- logic (operator (AND, OR, XOR, NAND, XNOR, NOR), operand1, operand2)
- trigger sequencer/sequence editor (4 user patterns per channel (length: 4-16), pattern rotation)
- channel 4: DAC mode (on channel #4) (random, binary sequencer, LFSR ('turing'), logistic map)
- external clock/internal timer
- flexible CV mapping (inputs can be assigned to any parameter)

• 85mA (@120MHz)

https://github.com/mxmxmx/temps_utile-